Logic Training Board on Gates using I.C., Model – LTB – 10.

Study OF OR, NOR, AND, NAND, NOT GATES using Diodes and Transistor, Model – LG – 10.

Study of Half And Full Adder, Model – HA – 07.

Study of Half and Full Subtractor, Model – HA – 08.

Experimental Board on Flip – Flops, Model– F– 02

Experimental Board on 4 – Bit shift Registers, Model – SR – 04

8–Bit R – 2R Digital – to – Analog Converter using Op – Amp. Model – D – 07

Study of 4 – Bit Analog –to – Digital Converter using counter method, Model –D– 08

Study of Differential Amplifier Using Op – Amp., Model – DA – 10

Verification of truth – table of multiplexer (16:1) using I.C.– 74150, Model – MUX – 150

Verification of truth – table of Demultiplexer (1:16) using I.C.– 74154,Model – MUX–154

Study of Clock Oscillator using 555, CMOS Inverter, Model – OS–55

Study of Binary Adder/Substracter using I.C. – 7483 (4–Bit), Model - BAS – 04

Study of 3 to 8 Line Decoder / Demux – 74138, Model– LD – 138.

Study of 8 to 3 Line Encoder using I.C. – 4072, Model – EC – 10

Study of Transfer Characteristics of TTL Inverter And Schmitt Trigger, Model- TTL – 10.

Study of Transfer characteristics of CMOS Inverter, Model – CI – 01.

Study of Random Access Memory (Ram) Circuit, Model – RAM – 10

Study of Arithmetic Logic Unit Using I.C. – 74181, Model– ALU – 10

Study of Presettable BCD Decade Up / Down Counter using I.C.-74190, Model – UD – 190

Verification of Maximum Power Transfer Theorem, Model –M – 10 DC

Verification of Network Theorems, Model – N – 10 (in DC Circuit)

Verification of Network Theorems, Model – N – 10 AC (in AC Circuit)

Verification of Tellegen’s Theorem, Model – TG – 10

Verification of Reciprocity Theorem, Model – RT – 10

Study of Cascaded to Port Network Model – TPN – 10.

Verification of Kirchhoff’s Current Law and Voltage Law, Model – KCV – 10

Verification of Ohm’s Law , Model – OL– 10

Study of Symmetrical “T”, “” and bridge– t attenuators, Model – BT – 10

Study of Clipping and Clamping Circuit Trainer, (Using I.C. – Op – Amp.), Model – CAC – 10.

Study of L.C.R. Series and parallel circuit Model – LCR – 12

Study of Transient Response of R. L. C. Circuits, Model – TR – 01.

Study of LDR Characteristics Apparatus, Model – LDR – 10

Characteristics of Opto Electronics Devices, Model – OPTO – 10

ANDERSON BRIDGE (AB-10)

MAXWELL BRIDGE (MB-10)

HAY’S BRIDGE (HB-10)

SCHERING BRIDGE (SB-10)

WHEAT – STONE BRIDGE (WSB-10)

WIEN BRIDGE (WB-10)

DE – SAUTY BRIDGE (DSB-10)

OWEN BRIDGE (OB-10)

VERIFICATION OF TRUTH – TABLE OF MULTIPLEXER (8 : 1) USING I.C. – 74153, (MUX – 153)

VERIFICATION OF TRUTH – TABLE OF DEMULTIPLEXER (1 : 8) USING I.C. – 74155, (MUX – 155)

STUDY OF MONOSTABLE MULTIVIBRATOR USING I.C. – 74121 AND 74123, (MMV – 123)

EXPERIMENTAL BOARD ON COUNTERS AND SHIFT REGISTERS, (CSR – 10)

Verification of truth – table of Demultiplexer (1:16) using I.C.– 74154,Model – MUX–154

FEATURES :

• The  I.C. – 74150  is  a  1 : 16  TTL  Demultiplexer  is  used  in  this  experimental  set – up.
• The  complete  pin – diagram  is  printed  on  a  aluminum  sheet  to  facilitate  better  and  clear  understanding.
• The  four   control  switches  are  provided  for  observing  the  truth – table.
• The  LED’s  are provided  with  input  and  output  pins  indicating  high  or  low  position.
• A  complete  working  manual  containing  operating  instruction,  theory  and  pin  configuration  will  be  supplied  alongwith   the  experimental  set – up.
• Builtin  I.C.  regulated  and  short  circuit  proof  ±  12 Volt  Power  Supply   suitable  to  the  experimental  board  is  builtin.
• Stackable  type  connecting  leads  suitable  to  the  terminals  are  supplied  with  the  board  for  easy  inter – connections  and  longer  working  life  of  the  terminals.
• Weight : 2 Kg Approximately
• Dimension : 210mm × 280mm × 82mm

EXPERIMENTS :

1. Verification  of   Truth – Table  of   DEMULTIPLEXER  (1 : 16)  using  I.C. – 74154.

OTHER  APPARATUS  REQUIRED :

1. Board  is  self  sufficient.

Note: There may be any change in specification due to continuous R & D without notice.

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